Spartan-3E Starter Kit Board User Guide
How to install Xilinx's software
Lab 1 (08/31/09 - 09/05/09): Introduction to Discrete Digital Logic
Lab 2 (09/07/09 - 09/12/09): Part 1: Introduction to VHDL, ISE and ModelSimi; Part 2: Basic VHDL language constructs. Concurrent signal assignment statements, components. READ RTL BOOK SECTION 2, UP TO SUBSECTION 2.2 (included), and SECTION 3, UP TO SUBSECTION 3.2.3 (included).
- Lab Manual Part 1/Tutorial
- Files for part 1: Source file , Testbench file and Ucf file
- Lab Manual Part 2/Tutorial
- Lecture notes - slides
- Additional slides about testbench
- Worksheet
for information on ise software, refer to this ise help
Lab 3 (09/14/09 - 09/18/09): Sequential statements of VHDL. Process. Use of variables in sequential circuit description. Counters. READ RTL BOOK SUBSECTIONS 3.3 AND 3.5, SECTION 4 UP TO SUBSECTION 4.4 (included), SECTION 5 UP TO SUBSECTION 5.5 (included)
- Laboratory Manual/Tutorial
- Worksheet
- Lecture notes - slides
- Laboratory files: The source code is at the end of the Tutorial
Lab 4(09/20/09-09/25/09) Synthesizable VHDL Design
Lab 5 (10/05/09 - 10/10/09): State machines
- Laboratory Manual/Tutorial
- Worksheet
- Lecture notes - slides
- Source files corresponding to the tutorial
Lab 6 (10/12/09 - 10/17/09): Finite/Algorithmic State Machines. Please read Sections 10.1, 10.2, 10.5.1 and 10.5.2.
Lab 7 (10/26/09 - 10/31/09): More ASMs
Lab 8 (11/01/09 - 11/06/09): VGA controller
Lab 9 (11/9/08 - 11/14/08): Repetitive-substraction division
Other resources:
