Site last updated
9/12/03

INTRODUCTION TO DIGITAL LOGIC

Objectives:

   1.  To design a simple circuit through the use of truth tables.

   2.  Familiarization with designing and testing (through the use of truth tables) circuits using silicon chips.

   3.  Familiarization with some of the Boolean Algebra theorems by implementing a number of them.

   4.  To get familiar with the Xilinx Foundation tools for simulating, implementing, and testing a logic circuit.

The overall concept behind the lab portion of this class is to provide you with a way to have a physical connection to the theory that you are learning in the classroom. 

This first lab will take you a little longer than the rest as you will have to overcome many preliminary problems (computer, keys for doors, etc.) that you will not have to encounter in subsequent labs. 

For completion of this lab you will need to read and understand the Lab assignment.  The overall plan is that you will develop an understanding of what the assignment calls for.  You will develop all logic on paper.  There are two parts to most labs.  There is a physical part with chips and a Xilinx part.  The part with  chips you will have to do during your assigned time since your TA will have to verify proper operation.  You will need to turn in a Lab Pre-report before you start the actual lab.  Go to Lab Report Layout for more information on lab reports.   The Xilinx portion you can do at any time since you have a key to the lab.  

You will need to come to the lab and develop your project in Xilinx.  Like any new software package, this will take a little time.  The sample project from the Lab Introduction should help you get through Lab #1.  This first lab has five very small parts.  We will give you the VHDL code for all five parts.  You just have to paste it in and simulate it.

For all five parts, you should be able to simply paste the code in from this link and using the procedures outlined in sample project, be able to simulate and complete this lab.  When completing section four and five you will have to print out "deliverables".  Deliverables serve several purposes.  They give us verification that you are properly completing the assignments and that you understand the basic concepts.  They also serve a much greater purpose of providing you with information about how your project functions. 

Part One: Implement a 2-input NAND gate using a 3-input NAND gate.

In the context of Boolean algebra, the AND operation is denoted · , the OR operation is denoted +, and the NOT operation is denoted ´. An OR gate can have two or more inputs. If all inputs are 0, then the output is 0. If one or more inputs are 1, then the output is 1. An AND gate can have two or more inputs. If all inputs are 1, then the output is 1. If one or more inputs are 0, then the output is 0. Finally, NAND means AND first, then NOT.

1.  Create a 2-Input NAND from a 3-Input NAND

The Work sheet contains a truth table for the NAND functions (A · B)´, (A · B · 0)´ and (A · B · 1)´. Fill out the truth table.  Based on what you see, implement a 2-input NAND gate using a 3-input NAND gate.

  A.  Design the circuit on paper.

    (A1)   Use a 3-input NAND chip.

    (A2)  Two circuit inputs: A and B.

    (A3)  One circuit output: F = (A · B)'.

    (A4)  Draw a layout diagram giving the relative position of the chips on the            breadboard.

    (A5)  Draw a logic diagram.

    (A6)  Develop the circuit in Xilinx.  The VHDL code and a brief description of VHDL can be found here in Lab 1 Tutorial.  Use the sample project example as a guide. 

    (A7)  Compare your simulation to those of your truth table. 

 B.  Internet students use Winbreadboard to construct and simulate the circuit.  Regular students build the circuit on the logic trainer in the lab and demonstrate the circuit to the lab teaching assistant (TA).  Verify that the circuit operation agrees with the truth table. 

Part Two.  The Extension Theorem

In the second and third parts of this lab you will verify certain Boolean algebra theorems with truth tables and circuits. There are two extension theorems, one of which is:                                          

                              X + (X´ Y) = (X + Y)

  A.  Verify with truth tables. The Work sheet contains a truth table for X + (X´ Z) and (X + Y). Fill it out. The last two columns should be the same.

    (A1)  Implement the circuit on paper.

    (A2)  Use 2-input AND gates and 2-input OR gates.

    (A3)  Two inputs: X and Y.

    (A4)  Two outputs: F1 = X + (X´Y) and F2 = (X + Y)

    (A5)  Draw a layout diagram giving the relative position of the chips on the  breadboard.

    (A6)  Draw a logic diagram.

    (A7)  Use the same inputs for both circuits

     (A8)  Develop the circuit in Xilinx.  The VHDL code is here in Lab 1 Tutorial.  Again, use the sample project example as a guide.  You shouldn't attempt to take your origional project and just swap out the code.  It doesn't work very well.  Your best bet it to make a new project for the second set of code.

    (A9)  Compare your simulation to those of your truth table. 

 B.    Internet students use Winbreadboard to construct and simulate the circuit.  Regular students build the circuit on the logic trainer in the lab and demonstrate the circuit to the lab teaching assistant (TA).  Verify that the circuit operation agrees with the truth table.    

Part Three: Self-Dual Theorem

The self-dual theorem states that  (X + Y)(X´ + Z) = X´Y + XZ

  A.  Verify with truth tables. The Work sheet contains a truth table for (X + Y)(X´ + Z) and X´Y + XZ. Fill it out. The columns for these two functions should be the same.

    (A1)  Design the circuit on paper.

    (A2)  Use 2-input AND gates, 2-input OR gates, and NOT gates.

    (A3)  Three inputs: X, Y and Z.

    (A4)  Two outputs: F1 = (X + Y)(X´ + Z) and F2 = X´Y + XZ

    (A5)  Draw a layout diagram giving the relative position of the chips on the breadboard.

    (A6)  Draw a logic diagram.

    (A7)  Use the same inputs for both circuits.

    (A8)  Develop your circuits in Xilinx.  As before, your code is given to you.  It is located  here in Lab 1 Tutorial. 

Deliverables for LAB 1

When completed, you will hand in the following deliverables (to your TA) for Lab #1:

1.  Use the Lab Report Layout as a guide.

2.  Printed VHDL for Part Three.

3.  Printed simulation waveform data for Part 3 showing that the simulation coincides with the expected truth table of your function.  On the simulation, circle the point where all three inputs go "high" (5V).

4.  A printout of the "Post Synthesis Report" from the Report tab of the Project Manager for Part 3. 

B.  Internet students use Winbreadboard to construct and simulate the circuit.  Regular students build the circuit on the logic trainer in the lab and demonstrate the circuit to the lab teaching assistant (TA).  Verify that the circuit operation agrees with the truth table.

Click here to go to the Lab 1 worksheet.