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MINIMIZING DIGITAL LOGIC USING K-MAPS
Objectives:
1. To use the knowledge learned in Lab 1 to design more complicated circuits.
2. To use Foundation 3.1i to create a circuit using schematic-based entry.
Someone stopped me in the hall and asked about simulation and it's importance. Why we care about the lines going up and
down. Those lines are actually voltages (usually 5v and 0v) that could be used as control signals to turn devices off and on. The benefit is sometimes hard to see. Up to this point your projects
have been small with only a few gates. Imagine if your assignment was a control system for a cardiac monitor. Simulation allows you to check your design while it is still in the creation phase.
Once you begin burning 100,000 of these chips, it will be too late to start testing. Simulation allows you to do testing before the first chip is made.
There are three parts to this lab.
Part 1: Given the following Boolean function in three variables:
F1(X,Y,Z) = X'Z' + X'YZ + XY'Z'
(A) Fill out the truth table for F1 in the work sheet.
(B) Immediately below the truth table for F1 is a K-map. Fill out the K-map.
(C) Use the K-map to simplify the Boolean function. Call it F2. Show your work.
(D) Design F1 using AND and OR gates and F2 using only NAND gates and inverters. There are three inputs: X, Y, and Z and
their complements. There are two outputs: F1 (original) and F2 (simplified) Use the gates as stated above. Draw layout diagrams giving the relative position of the chips on the breadboard.
Draw logic diagrams.
(E) Implement both circuits. Connect the same inputs to both circuits and record the outputs for both. Verify that circuit operation agrees with the truth table.
Internet
students use Winbreadboard to construct and simulate the circuit. Regular students build the circuit on the logic trainer in the lab and demonstrate the circuit to the lab teaching assistant (TA).
Part 2: A function with four variables
Here is a Boolean function of four variables:
F3=A'B'D + BC'D + A'BC + ACD
(A) Fill out the truth table for F3 in the work sheet.
(B) Immediately below the truth table for F3 is a K-map. Fill out the K-map.
(C) Use it to simplify the Boolean function. Show your work.
(D) Design the simplified circuit using NOR gates. There are four inputs: A, B, C, and D (along with the complements). There is one output: F3. Draw a layout diagram giving the
relative position of the chips on the breadboard. Draw a logic diagram.
Internet students use Winbreadboard to construct and simulate the circuit. Regular students build the circuit on the logic
trainer in the lab and demonstrate the circuit to the lab teaching assistant (TA). Verify that the circuit operation agrees with the truth table.
Part 3: Implement F3 in Xilinx.
The complete step-by-step procedures and tutorial is located here. It will take you approximately 20 minutes to complete this
tutorial. When you are done, you should have adequate training to complete this part of the lab with no problem.
When completed, you will hand in the following deliverables (to your TA) as part of your
formal report:
1. Print out your schematic from the Schematic Editor.
2. For your function of four input variables, print out the simulated waveform traces
(enough of the waveform so that all sixteen possible input combinations are shown), and show that the simulated waveform exactly matches the expected truth table.
3. From the "Reports" section, print out the Export Netlist.
4. Answer this question: What advantage does circuit simplification gain a design engineer?
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