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FUNDAMENTALS OF DIGITAL LOGIC DESIGN AND SIMULATION Objectives: 1. To become familiar with the use of multiplexers in circuit design. 2. To become familiar with code converters and incorporating LED's into design testing. 3. To become familiar with Xilinx's HDL Design Wizard in creating a circuit. |
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This lab has three parts. The first two parts are traditional and the third part is with Xilinx. In the first two parts you will be creating a subtractor with multiplexers and a code converter. The third part will be a subtractor with multiplexers in Xilinx. Part One: Use MUX's to Implement Subtraction A. Design the circuit on paper. 1) Fill out the Karnaugh map on the worksheet for the subtractor (X - Y - b). 2) Design the full subtractor using two multiplexer's. You will need to use the 8-to-1 MUX and decide which variables to use on the select lines. 3) It should have three inputs: X, Y, and b_in. 4) It should have two outputs: B_out and D. 5) Draw a logic diagram for the subtractor. B. Internet students use Winbreadboard to construct and simulate the circuit. Regular students build the circuit on the logic trainer and demonstrate the circuit to the lab teaching assistant (TA). Verify that the circuit operation agrees with the truth table. Part Two: Code Conversion: 8421 Code to 84-2-1 Code. The table below gives the relationship between 8421 and 84-2-1 codes. The left-hand side of the table is your input and the right-hand side is your output. |
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A. Design the circuit on paper. 1). Design the code converter using whatever components you like (NAND, NOR, AND-OR, MUX) with the goal of minimizing the circuitry. 2). It will have four inputs: A, B, C, and D (ordered from left to right on the switches). 3). It will have four outputs: W, X, Y, and Z (ordered left to right or top to bottom on the LEDs). 4). Draw a layout diagram giving the relative position of the chips on the breadboard. 5). Draw a logic diagram. B. Internet students use Winbreadboard to construct and simulate the circuit. Regular students build the circuit on the logic trainer and demonstrate the circuit to the lab teaching assistant (TA). Verify that the circuit operation agrees with the truth table. Part Three: Implementation of your version of the subtractor in Xilinx. In the first lab we created our design using the VHDL method of creation. In the second lab we used the schematic capture method. Schematic capture was a good introduction for what you will see in EECE 338 but for this course, the underlying theme is VHDL. As in the previous two labs, we will give you a step by step tutorial for completion of this project. Click here to go to that tutorial. For the subtractor, we are going to give you 95 percent of the code and you will be responsible for developing the remaining portion. At the bottom of the tutorial you will find a list of what deliverables need to be turned in with this lab. |
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Click here to go to the Lab 3 tutorial. |
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Click here to go to the Lab 3 work sheet. |
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