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LAB 7 ASSIGNMENT
Objectives:
1.Perform a more indepth analysis of device devolpment using Floorplanner.
2.Perform a more in-depth analysis of device development usign Chipviewer.
3.Perform an in-depth analysis of device development using XPower.
Assignment:
1.Write the VHDL code for the following logic:
Y=A or B
This should be very simple code to develop.
Develop a quick test bench to make sure the code does what it is supposed to do. The purpose of this lab isn't coding, it is for you to understand how the code is developed into the different styles of
hardware. It is believed that if you can understand how smaller projects are developed onto the hardware, you can begin to be able to see how the larger projects are also developed.
I have gone through an
entire series of tutorial for my Y = A and B code. You will repeat the steps using your code.
DELIVERABLES:
1.Your VHDL code
2.Your floorplanner view
showing both placements. Annotate on the pictures how they are different. The first time through you should use a .ucf file or the constraints editor to place your pins. The second time you should
use the floorplanner to do the logic and pin assignment similar to mine in the tutorial (upper left hand CLBs and IOBs).
3.Change your project from the SpartanXL device to the VirtexE device shown in
the tutorial.
4.Take your VirtexE project and explore XPower. Use XPower and show two different Total Power values by increasing and decreasing VCCInt.
5.By using XPowers Power Report, print out
two reports showing the differences in Total Power when your inputs ("a" and "b") are set to 0 MHz and then again when they are set to 100 MHz.
6.Translate your project into an XPLA CPLD project similar to
the tutorial. Using ChipViewer, assign your two inputs to the top two I/O (input/output) pins on the left hand side of the device and your output to the top right I/O pin. Print out a picture of this
when it is complete.
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