UART
A UART (Universal Asynchronous
Receiver/Transmitter) is the microchip with programming that controls
a computer's interface to its attached serial devices. Specifically,
it provides the computer with the RS-232C Data Terminal Equipment (DTE)
interface so that it can "talk" to and exchange data with
modems and other serial devices.
Several cores are available, OPB_UART16550 (incorporating the features
described in National Semiconductor PC16550D UART with FIFOs data sheet),
OPB_UART16450 (incorporating the features described in National Semiconductor
PC16550D UART with FIFOs data sheet) and OPB_UARTLITE.
Additionally OPB_JTAG_UART is a module that attaches to the OPB bus
(On-Chip Peripheral Bus), and mimics UART functionality to MicroBlaze
but sends data over JTAG interface. This reduces the need of a serial
port (hardware).
Basic features are:
- Register compatible with
industry standard 16550/16450
- 5, 6, 7 or 8 bits per
character
- Odd, even or no parity
detection and generation
- 1, 1.5 or 2 stop bit detection
and generation
- Internal baud rate generator
and separate RX clock input
- Modem control functions
- Prioritized transmit,
receive, line status & modem control interrupts
- Internal loop back diagnostic
functionality
- Independent 16 word transmit
and receive FIFOs
[1] Whatis.com
[2] EDK Workshop - UNM August 2003. John Linn Rick Moleres.
[3] OPB 16450 UART, Product Specification (DS433 v1.2)
[4] OPB 16550 UART, Product Specification (DS430 v1.2)
[5] OPB UART Lite, Product Specification (DS209 v2.3)
[6] OPB JTAG UART, Product Specification (DS208 v2.3)
Interrupt controllers
Interrupt controllers are
used to expand the number of interrupt inputs a computer system has
available to the CPU and, optionally provide a priority encoding scheme.
The block that implements this function in our embedded system is the
opb_intc.
The IntCore is a simple, parametrized interrupt controller that, along
with the appropriate bus interface, attaches to either the OPB (On-Chip
Peripheral Bus) or the DCR (Device Control Register) Bus. It can be
used in embedded PowerPC systems and in Microblaze soft processors systems.
An interrupt Controller has the following features:
- Number of interrupt inputs
is configurable up to the width of the data bus width
- Interrupt controllers
can be easily cascaded to provide additional interrupt inputs
- Master Enable Register
for disabling the interrupt request output
- Each input is configurable
for edge or level sensitivity
- Rising or falling,
active high or active low
- Output interrupt request
pin is configurable for edge of level generation
[1] OPB Interrupt Controller
Product Specification. (DS207 v4.2)
[2] EDK Workshop - UNM August 2003. John Linn Rick Moleres.
Timers and clock
For computers, clocks and
timers usually provide three services. They provide the current time,
the elapsed time (how long something has occured), and a trigger to
activate an action (turn something on or off at a specific time). The
block that implement this function is the opb_timer and as its name
implies it is attached to the OPB (On-Chip Peripheral Bus).
The TC (Timer/Counter) is
a 32-bit timer module that have the following features:
- OPB V2.0 bus interface
with byte-enable support
- Supports 32-bit bus interface
- Two programmable interval
timer s with interrupt, event generation, and event capture capabilities
- Configurable counter width
- One Pulse Width Modulation
(PWM) output
- Freeze input for halting
counters during software debug
Three different modes can
be configured:
- Generate Mode: Mode useful
for generating repetitive interrupts or external signals with a specified
interval.
- Capture Mode: Mode useful
for time tagging external events while simultaneously generating an
interrupt.
- Pulse Modulation (PWM)
mode: Used to produce and output signal (PWM0) with a specified frequency
and duty factor.
General Purpose Input
and Output (GPIO)
The GPIO (General Purpuse
Input/Output) is a 32-bit peripherical that attaches to the OPB (On-Chip
Peripheral Bus), and has the following features:
- OPB V2.0 bus interface
with byte-enable support
- Supports 32-bit, 16-bit,
and 8-bit bus interfaces
- Each GPIO bit dynamically
programmable as input or output
- Number of GPIO bits configurable
up to size of data bus interface
- Can be configured as inputs-only
to reduce resource utilization